	list      p=16F88           ; list directive to define processor
	#include <p16f88.inc>        ; processor specific variable definitions
;	errorlevel  -302              ; suppress message 302 from list file


	__CONFIG    _CONFIG1, _CP_OFF & _CCP1_RB0 & _DEBUG_OFF & _WRT_PROTECT_OFF & _CPD_OFF & _LVP_OFF & _BODEN_OFF & _MCLR_OFF & _PWRTE_ON & _WDT_ON & _INTRC_IO
	__CONFIG    _CONFIG2, _IESO_OFF & _FCMEN_OFF
#define sda TRISB,1
#define scl TRISB,4

var_main    UDATA_SHR
WREGsave    res 1
STATUSsave  res 1
FSRsave     res 1
PCLATHsave  res 1

tmp         res 1
buf         res 4
bit         res 1
cbit        res 1
cbyte       res 1
hest        res 1
fsr         res 1

STARTUP	CODE
  goto  startup
  nop
  nop
  nop
  goto  ISR

sec_main  CODE

;====================
ISR
;====================
  banksel INTCON
  bcf   INTCON,7

  movwf	WREGsave
  movf	STATUS,W
  movwf	STATUSsave
  movf	PCLATH,W
  movwf	PCLATHsave
  movf	FSR,W
  movwf	FSRsave
;--------------------
; put ISR here

  banksel PIR1
  bcf PIR1,SSPIF

ISR_TMR0
  banksel INTCON
  btfss   INTCON,TMR0IF
  goto    ISR_END
  bcf     INTCON,TMR0IF
  call    tmr0
  banksel TMR0
  movlw b'11100000'
  iorwf TMR0,f

;--------------------
ISR_END
  movf	FSRsave,W
  movwf	FSR
  movf	PCLATHsave,W
  movwf	PCLATH
  movf	STATUSsave,W
  movwf	STATUS
  swapf	WREGsave,F
  swapf	WREGsave,W
  
  banksel INTCON
  bsf   INTCON,7
  retfie
;--------------------

;====================
startup
;====================
  movlw h'80'
;  movlw h'53'
  movwf buf
  
  movlw h'07'
  movwf buf+1
  
  movlw h'04'
  movwf buf+2
  
;  movlw h'AB'
;  movwf buf+3

  clrf  hest

;bank 0
  banksel PORTA
  clrf  PORTA
  clrf  PORTB
  
  clrf  TMR0
  
  movlw 1<<GIE|0<<PEIE|0<<TMR0IE|0<<RBIE
  movwf INTCON
  
;  movlw b'1011' ;i2c, master mode
;  movwf SSPCON
;  bsf SSPCON,SSPEN
  
;bank 1
  banksel TRISA
  movlw b'00000000'
  movwf TRISA
  movlw b'00011110'
  movwf TRISB
  
  clrf  ANSEL
  
  movlw 0<<ADIE|0<<RCIE|0<<TXIE|0<<SSPIE|0<<CCP1IE|0<<TMR2IE|0<<TMR1IE
  movwf PIE1
  
;  movlw 0<<OSFIE|0<<CMIE|0<<EEIE
;  movwf PIE2
  
  movlw 1<<NOT_POR|1<<NOT_BOR
  movwf PCON
  
;  movlw b'00110000'   ;500kHz
  movlw b'01100000'   ;32kHz
  movwf OSCCON
  
  movlw 1<<NOT_RBPU|0<<INTEDG|0<<T0CS|0<<T0SE|0<<PSA|1<<PS2|0<<PS1|0<<PS0
  movwf OPTION_REG
  
  banksel SSPCON
  movlw b'1011' ;i2c, master mode
  movwf SSPCON
  bsf SSPCON,SSPEN
  bsf SSPCON,CKP
  
  movlw d'3'
  movwf cbyte
  
  movlw d'10'
  movwf cbit
  
  clrf  bit
  
  movlw buf
  movwf fsr
  movf  buf,w
  movwf tmp
  
  goto  main
;--------------------
  
;====================
main
;====================
  clrwdt
  banksel PORTA
;  movf  tmp,w
;  movwf PORTA
  btfsc PORTB,2
  goto  main
main2
  btfsc PORTB,2
  goto  main3
  clrwdt
  goto  main2
  banksel SSPSTAT
main3
  btfsc SSPSTAT,P
  goto  main4
  clrwdt
  goto  main3
main4
  banksel INTCON
  bsf INTCON,TMR0IE
  goto  main
;--------------------


start
  bcf sda
  decf  cbit,f
  return

inc
  bsf STATUS,C
  rlf tmp,f

  
  decfsz  cbit,f
  return
  movlw d'9'
;  btfsc cbyte,0  ;generate another start if we want to read
;  movlw d'10'
  movwf cbit

  decf  cbyte,f
  btfsc STATUS,Z
  goto  stop
  incf  fsr,w
  movwf fsr
  movwf FSR
  movf INDF,w
  movwf tmp
  return

stop
  movlw d'17'
  movwf cbit
  clrf  tmp
  return
  
stop2
  bsf sda
  banksel INTCON
  bcf INTCON,TMR0IE
  goto $
  return

tmr0
  banksel TRISB

  movlw d'10'   ;with 10 bits left
  xorwf cbit,w
  btfsc STATUS,Z
  goto  start   ;start
  
  movlw d'16'   ;with 16 "bits" left
  xorwf cbit,w
  btfsc STATUS,Z
  goto  stop2   ;stop
  
  banksel SSPCON
  bsf SSPCON,CKP
;  movlw d'00000001'
;  xorwf PORTB,f
  
  banksel TRISB
  
  movlw b'00010000'
  xorwf TRISB,f ;toggle scl
  
  btfsc scl
  goto  inc
  
  movlw 0
  btfsc tmp,7
  movlw b'00000010'
  xorwf TRISB,w
  andlw b'00000010'
  xorwf TRISB,f
  return

end
